1. Field of Invention
The present invention relates to a memory cell and a fabricating method thereof. More particularly, the present invention relates to a memory cell having metal-oxide-quantum dot-oxide-polysilicon fabricated on a glass substrate and a fabricating method thereof.
2. Description of Related Art
Due to the features of light-weight and compactness, the liquid crystal display (LCD) and the organic light emitting display (OLED) have gradually become display tools of the portable terminal systems in the last twenty years. In particular, the twist nematic liquid crystal display (TN-LCD), the super twist nematic liquid crystal display (STN-LCD), the thin film transistor liquid crystal display (TFT-LCD) and the organic light emitting display (OLED) have become indispensable daily used products for people. In a common TFT-LCD, a pixel thereof comprises a TFT, a storage capacitor and a pixel electrode. The image data to be written into each pixel would be stored in the storage capacitor and be updated frame by frame. Therefore, the TFT-LCD with such architecture has a high power-consumption.
For many portable electronic products today, the LCD thereof displays static images for the most of the time. Thus, it is not necessary to refresh the image data stored in a pixel all the time. Under such situation, if a memory, such as a static random access memory (SRAM) or a dynamic random access memory (DRAM), can be embedded in each pixel, the power-consumption of LCD would be largely reduced.
FIG. 1 is a circuit diagram of a conventional pixel structure. Referring to FIG. 1, a conventional pixel structure 100 for displaying static frames includes a TFT 110, a liquid crystal capacitor 120, a memory control circuit 130 and a SRAM 140. Wherein, the gate G of the TFT 110 is electrically connected to a scan line SL, the source S of the TFT 110 is electrically connected to a data line DL and the drain D of the TFT 110 is electrically connected to a liquid crystal capacitor 120. In addition, the drain D of the TFT 110 is electrically connected to the SRAM 140 through the memory control circuit 130, so that the image signal input into the liquid crystal capacitor 120 from the data line DL can be stored in the SRAM 140 through the memory control circuit 130.
Under the condition of displaying static images, since the SRAM 140 can remain the differential voltage of the liquid crystal capacitor 120 without updating the data all the time, the power-consumption can be largely reduced. However, since a SRAM 140 comprises four TFTs T1 and a memory control circuit 130 comprises two TFTs T2, the circuit layout of the pixel structure 100 is considerably crowded. Moreover, because the TFTs T1 and T2 adversely affect the aperture ratio of the pixel structure 100, the pixel structure 100 is applicable to a reflective LCD panel, and is not suitable for a transmissive LCD panel.
Currently, Ge quantum dots having a charge storage function is proposed to replace the polysilicon floating gate or charge storage layer of the conventional memory. A rapid thermal process has been disclosed in U.S. Pat. No. 6,962,850 B2, which sustains 30 seconds under 800-1,000° C. to separate out Ge quantum dots from the Ge-doping silicon oxide layer. However, as the above method of forming Ge quantum dots must be carried out under a high temperature, which leading to the increase of the thermal budget of the process.
Furthermore, another method of forming Ge quantum dots has been disclosed in “MOS Memory Using Germanium Nanocrystals Formed by Thermal Oxidation of Si1-xGex”, Electron Devices Meeting, 1998. IEDM '98 Technical Digest., International 6-9 December 1998 Page(s):115-118, in which dry oxidation process and wet oxidation process are alternately repeated several times to separate out the Ge quantum dots. However, this method is quite complicated and may cause an increase of the thermal budget of the process.
In view of the above, some related techniques are disclosed in some U.S. Patents, such as U.S. Pat. Nos. 6,139,626, 5,183,498, 6,518,194, 6,656,568, 6,846,565 B2. The entire content of the above documents is incorporated herein by reference.